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Course Outline

DAY 1:

  • RTE/SchMin ECU SW-Architecture
  • Methodology (VFB, ComponentTypes, Communicationpatterns, Ports)
  • Discussion of RTE examples, RTE events, RTE data consistency, and the RTE generator
  • BSW Scheduler (SchM)
  • Case study: CUBAS ETAS RTE generator

DAY 2:

  • AUTOSAR 4.0
  • Multicore architecture and protection mechanisms
  • Variant handling and measurement
  • Calibration

Requirements

  • Fundamental knowledge of embedded systems
  • Basic understanding of AUTOSAR

This course can only be delivered using customer software licenses.

 14 Hours

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